TSMC Plans to Expand Outsourcing of CoWoS Chip-on-Wafer Packaging

TSMC plans to further expand outsourcing of the Chip-on-Wafer stage in its CoWoS advanced packaging process, assigning more packaging orders to OSAT firms such as ASE, according to Electronic Times. According to ChainCatcher, the move is aimed at easing packaging capacity constraints caused by surging demand for AI chips.

CoWoS is TSMC's 2.5D packaging technology that connects GPUs and other AI processors with HBM through an interposer. The Chip-on-Wafer step joins the chip to the interposer, while the Wafer-on-Substrate step handles substrate packaging. TSMC previously outsourced mainly the Wafer-on-Substrate stage and only assigned limited Chip-on-Wafer work externally.

The article said TSMC holds about 90% of the global AI chip manufacturing market, but capacity has struggled to keep pace with rising demand from companies such as Nvidia and AI data centers developing their own chips. Industry participants expect OSAT firms to increase equipment investment significantly, especially in wafer dicing and bonding. Several South Korean laser processing and bonding equipment suppliers have reportedly been in talks with OSAT firms about CoW equipment supply.